AutoHLS creatively incorporates a deep neural network (DNN) with Bayesian optimization (BO) within a new framework to optimize high-level synthesis (HLS) hardware design. It specifically addresses the lengthy process of HLS design exploration for FPGA resource budgeting.

• The framework speeds up HLS pragma exploration and operation transformation.
• Provides potential insights into quantum neural networks (QNNs) in place of classical DNNs for the AutoHLS process.
• Demonstrates a remarkable speedup in exploration time, up to 70-fold.

Emphasizing the synergy between deep learning and hardware design optimization, AutoHLS represents a significant step forward in streamlining HLS design processes. The possibility of integrating QNNs into this structure can open exciting opportunities in efficiently prototyping hardware, propelling advancements in various technology sectors from IoT to AI chips. AutoHLS exemplifies the transformative impact that learning algorithms can have on hardware engineering.

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